This invention relates to a circuit arrangement for limiting the switching-on current peaks in a switching transistor having a control input to which rectangular switching pulses of the same height are applied.
Such an arrangement is known, for example, from German Patent Application DE-35 18 913. The switching transistor--a field effect transistor--in the known arrangement is included in the primary circuit of a clocked direct voltage converter. A pulse width modulator controls the switching time of the field effect transistor in that it applies between the gate and source connections of the transistor rectangular switching pulses which vary in length. A saturable choke by which the switching-on current peaks are limited is arranged in series with the main current path of the switching transistor, i.e. in the drain supply lead.
When the transistor is switched to the conducting state, without the use of the saturable choke the overall input voltage drops across its drain-source path. Therefore, high current peaks (8 A and higher) occur and thus high power dissipations in the transistor are the result, which can lead to its destruction. The choke limits the current peaks and then reaches the saturated state so that the further behaviour of the converter during a switching pulse is not influenced thereby.
Since, however, the choke is arranged in the operating circuit of the transistor, at the switching-on instants of the transistor a voltage difference of the order of the input voltage of the direct voltage converter appears across this choke. The choke must therefore be dimensioned so that it is capable of withstanding, without damage, accidental voltage differences of the indicated order. Dependent upon the type of application, the input voltage of a direct voltage converter can lie at a few volts or at a few hundred volts. Therefore, the known protection circuit must be dimensioned anew for each type of application if it is not to be unnecessarily overdimensioned.